High density nonvolatile memories, specifically flash EEPROMs, are currently considered as mass storage devices (or medias) for portable handy terminals such as digital still cameras and memory cards, and also for hard disks in personal computers, because of their advanced performance that comes from higher programming speed and lower power consumption. The flash memory is distinguished into two types of logical configurations, NAND and NOR. The NOR-type, in which each of memory cells is connected to its corresponding word line and bit line without being dependent upon adjacent memory cells, needs more contacts for coupling bit lines and memory cells than that of the NAND-type which is superior to the NOR-typed in integration density. In the NAND-type flash memory, each string containing plural memory cells is connected to a corresponding bit line only through one contact, whereas memory cells of the NOR-type are each coupled to a bit line.
In an ongoing effort for efficient integration density for more expanded memory capacity there has been development of multi-bit (multi-level, multi-state, or multiple bit) technology where a plurality of bits are stored in one memory cell. It is acknowledged that the multi-bit technology contributes to reduction of the cost per bit. A prior multi-bit configuration has been disclosed on pp. 132-133 of ISSC Digest of Technical Paper dated Feb. 1995, entitled "A Multilevel-Cell 32Mb Flash Memory" by M. Bauer et al., in which a cell array is arranged in the NOR-type and a memory cell stores one of four states with two bits such as "00", "01", "10" and "11". Each of the four states corresponds to a unique voltage level, e.g., "00"=2.5 V, "01"=1.5 V, "10"=0.5 V and "11"=-3 V. The voltage values are threshold voltages involved in reading out data from the memory cell storing one of the four states of data. Substantially, one memory cell contains a distribution profile corresponding to the plural states of threshold voltages and memory cells coupled to one word line have different threshold voltages each other.
To detect the state of a memory cell, a read voltage with voltage level interposed between threshold voltage levels (or positioned on a lower side or a higher side from the level of a threshold voltage) must be applied to gates of memory cells through a word line coupled in common thereto. In this situation, the width between adjacent threshold voltages (hereinafter referred to as "window") is less than in a normal flash memory. For example, the window in a four-state flash memory is about 0.6 V. Furthermore, when a word line voltage for reading is located in the window of about 0.6 V, the margin from an edge of the threshold voltage profile and the level of the word line voltage may be not more than about 0.3 V. Therefore, if a multi-bit flash memory is made with the accompanying variations of manufacturing process or influenced by variations in word line voltage level and temperature, the possibility of invalid sensing operations is increased. Such weak immunity against variations of external conditions reduces the utility of the multi-bit flash memory to a storage device for mass information such as audio data, where even failure for storing several data bits does not disturb a sufficient organization of information as a whole. Up to now, normal flash memories are used for storing stable information, such as BIOS (Basic Input/Output System) or fonts.
Even though the advantages of the normal and multi-bit flash memories have been well known, the two different types of flash memories are respectively fabricated on separated semiconductor chips. The prior art aforementioned just performs the alternative one out of single bit and multi-bit operations over the entire memory cells.